IEEE P2804: First Working Group Meeting

Teleconference, April 24th Wed 6:00 AM -7:30 AM (JST)/April 23rd Tue 11:00 PM – 0:30 AM(CET)/April 23rd Tue 2:00 PM – 3:30 PM (PDT)/April 23rd Tue 5:00 PM – 6:30 PM (EDT)

Software-Hardware Interface for Multi-Many-Core (SHIM^TM) or IEEE P2804 ^TM, is a new  standard includes performance estimation accuracy for complex processors like Very Long Instruction Word (VLIW) core and complex contention scenarios, description of caches to include uncached memory regions and caches for subsets of memories, properties for coarse power consumption estimation, and reusability by separating eXtensible Markup Language (XML) files for processor description and other memory/communication-related information.

The project is managed by the Design Automation Standards Committee of the IEEE Computer Society. Stakeholders for the standard include system developers, semiconductor vendors, and tool vendors.

Currently, participation and support for this project is from: The Multicore Association (MCA), Embedded Multicore Consortium (EMC), eSOL, Silexica, and Nagoya University.

We solicit the participation of those that are effected by, or the beneficiaries of this much needed standard. For additional information, please contact the Sponsor, the Design Automation Committee Chair, Stanley Krolikoski at [email protected] or visit https://sagroups.ieee.org/2804